The circuit presented here wakes you up with a loud alarm at the break of the daylight. Once again the 555 timer is used here. It is working as an astable multivibrator at a frequency of about 1kHz.

The circuit’s operation can be explained as follows:
When no light falls on the LDR, the transistor is pulled high by the variable resistor. Hence the transistor is OFF and the reset pin of the 555 is pulled low. Due the this the 555 is reset.
When light falls on the LDR, its resistance decreases and pulls the base of the transistor low hence turning it ON. This pulls the reset pin 4 of the 555 high and hence enables the 555 oscillator and a sound is produced by the speaker.

The variable 100K resistor has to be adjusted to set the light intensity that triggers the alarm.

The choice of the COB depends on the user. The signal generated by COB is amplified by an audio amplifier. In this circuit, the audio power amplifier is wired around IC TDA 2002. The sensitivity of the circuit depends on the distance between bulb and LDR as well as setting of preset VR1. Thus by placing the bulb and the LDR at appropriate distances, one may vary preset VR1 to get optimum sensitivity.
An ON/OFF switch is suggested to turn the circuit on and off as desirable.

1-Q1 should be aimed at the master flash. R1 should be adjusted for maximum sensitivity but no false triggering.

2-Keep your fingers away from SCR1 when the circuit is operating. It is at 50V-300V and will give you a nasty shock.

P1_____________22K  Log. Potentiometer (Dual-gang for stereo)

R1______________1K  1/4W Resistor
R2______________4K7 1/4W Resistor
R3____________100R  1/4W Resistor
R4______________4K7 1/4W Resistor
R5_____________82K  1/4W Resistor
R6_____________10R  1/2W Resistor
R7_______________R22  4W Resistor (wirewound)
R8______________1K  1/2W Trimmer Cermet (optional)

C1____________470nF  63V Polyester Capacitor
C2,C5_________100µF   3V Tantalum bead Capacitors
C3,C4_________470µF  25V Electrolytic Capacitors
C6____________100nF  63V Polyester Capacitor

D1___________1N4148  75V 150mA Diode

IC1________TLE2141C  Low noise, high voltage, high slew-rate Op-amp

Q1____________BC182  50V 100mA NPN Transistor
Q2____________BC212  50V 100mA PNP Transistor
Q3___________TIP42A  60V 6A    PNP Transistor
Q4___________TIP41A  60V 6A    NPN Transistor

J1______________RCA  audio input socket

Power supply parts:

R9______________2K2 1/4W Resistor

C7,C8________4700µF 25V Electrolytic Capacitors

D2_____________100V 4A Diode bridge
D3_____________5mm. Red LED

T1_____________220V Primary, 15 + 15V Secondary, 50VA Mains transformer

PL1____________Male Mains plug

SW1____________SPST Mains switch

Notes:

* Can be directly connected to CD players, tuners and tape recorders.
* Do not exceed 23 + 23V supply.
* Q3 and Q4 must be mounted on heatsink.
* D1 must be in thermal contact with Q1.
* Quiescent current (best measured with an Avo-meter in series with Q3 Emitter) is not critical.
* Adjust R3 to read a current between 20 to 30 mA with no input signal.
* To facilitate quiescent current setting add R8 (optional).
* A correct grounding is very important to eliminate hum and ground loops. Connect to the same point the ground sides of J1, P1, C2, C3 & C4. Connect C6 to the output ground.
* Then connect separately the input and output grounds to the power supply ground.

Technical data:

Output power:
18 Watt RMS into 8 Ohm (1KHz sine wave)
Sensitivity:
150mV input for 18W output
Frequency response:
30Hz to 20KHz -1dB
Total harmonic distortion @ 1KHz:
0.1W 0.02% 1W 0.01% 5W 0.01% 10W 0.03%
Total harmonic distortion @10KHz:
0.1W 0.04% 1W 0.05% 5W 0.06% 10W 0.15%
Unconditionally stable on capacitive loads

In the circuit, MOSFETs Q1 and Q2 switch the +5- and +12-V supplies, respectively, in a sequence controlled by two cross-coupled CD4001 CMOS NOR gates (U1C and U1D). The sequence in which power isapplied is important: The controlled circuits may be damaged anytime Vcc exceeds Vdd+0.3V. Consequently, the NOR gates must be powered from a 12-V supply throughout the power-down sequence.

Bringing the power down control high (+5V) applies power to the controlled circuit by turning on all MOSFETs. Specifically, raising the power down brings the output of U1C low, causing capacitor C1 to discharge VOL exponentially with time constant R1C1. As the voltage on C1 falls, two events occur.
First, it puts a negative gate-source voltage on P-channel Q1, turning it on. Second, it causes output gate U1D to go high. With the output of U1D high, capacitor C2 charges exponentially to VOH-about 12-V-applying a positive gate-source voltage to turn on Q2. In the power down mode, the Power Down control is brought low and the RC circuits and their delays work in reverse. Consequently, capacitor C2 discharges to the logic input of U1C before C1 can charge. Hence, Q2 turns off before Q1.